Deep learning on mobile devices: a review
How to Develop High-Performance Deep Neural Network Object Detection/Recognition Applications for FPGA-based Edge Devices - Embedded Computing Design
My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
Deep Neural Network ASICs The Ultimate Step-By-Step Guide eBook : Blokdyk, Gerardus: Amazon.in: Kindle Store
FPGA Based Deep Learning Accelerators Take on ASICs
Space-efficient optical computing with an integrated chip diffractive neural network | Nature Communications
FPGA Based Deep Learning Accelerators Take on ASICs
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
Google AI Blog: Chip Design with Deep Reinforcement Learning
Review of ASIC accelerators for deep neural network - ScienceDirect
The Great Debate of AI Architecture | Engineering.com
FPGA Based Deep Learning Accelerators Take on ASICs
The New Deep Learning Memory Architectures You Should Know About — eSilicon Technical Article | ChipEstimate.com
Arch-Net: A Family Of Neural Networks Built With Operators To Bridge The Gap Between Computer Architecture of ASIC Chips And Neural Network Model Architectures - MarkTechPost
Are ASIC Chips The Future of AI?
Intel Unveils FPGA to Accelerate Neural Networks
How to develop high-performance deep neural network object detection/recognition applications for FPGA-based edge devices - Blog - Company - Aldec
Deep Learning in Mining Biological Data | SpringerLink
Processing AI at the Edge: GPU, VPU, FPGA, ASIC Explained - ADLINK Blog
My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
FPGA vs GPU for Machine Learning Applications: Which one is better? - Blog - Company - Aldec
Processing AI at the Edge: GPU, VPU, FPGA, ASIC Explained - ADLINK Blog
Analog architectures for neural network acceleration based on non-volatile memory: Applied Physics Reviews: Vol 7, No 3
Intel Speeds AI Development, Deployment and Performance with New Class of AI Hardware from Cloud to Edge | Business Wire
